If you like to work hard, thrive on solving stimulating problems, and want to join an industry-leading team of ASIC and FPGA specialists, we want to hear from you

Why work with us?
We are a well-respected company with a highly skilled team
We care about our employees and offer them competitive compensation
We work with interesting companies on challenging projects
We’re looking to expand our world-class team
ASIC/FPGA Verification Specialist (Multiple)

Duties and Responsibilities

The ASIC/FPGA Specialist will work in an exciting team environment and will have the following responsibilities:

  • Priming the verification activities for a block or an entire chip.
  • Architecting the verification environment using OVM and writing the associated documentation.
  • Participating in the test case writing activity.
  • Using constrained random verification approaches when possible.
  • Using direct test cases to support lab bring-up.
  • Performing code coverage and functional coverage

Requirements

  • A minimum of 8 years of relevant experience in ASIC/FPGA Verification.
  • Familiarity with System Verilog, OVM/UVM, Verilog (mainly), VHDL, and scripting languages.
  • Familiarity with SONET, OTN, Ethernet, PCIe.
  • Familiarity with constrained verification techniques, assertions and functional coverage.
  • Excellent communication skills.

 

ASIC/FPGA Designer (Multiple)

Duties and Responsibilities

The ASIC/FPGA Designer will work in an exciting team environment and will have the following responsibilities:

  • Understanding high-level requirements and translating them into a detailed design specification documents.
  • Writing RTL (mainly Verilog or System Verilog), run block-level simulation, FPGA backend or ASIC synthesis, DFT insertion, timing closure.
  • Performing lab bring-up, product integration and support.
  • Interfacing with the verification team, hardware team and support team.

Requirements

  • A minimum of 6 years of relevant experience in the ASIC/FPGA design field
  • Strong RTL coding skills
  • Strong scripting skills
  • Familiar with SONET, OTN, Ethernet, PCIe
  • Excellent ability to work in a team
  • Experience with System Verilog would be an asset
  • Experience with SoC design would be an asset
  • Software background would be an asset
FPGA Design Engineer – 5G (Multiple)

Duties and Responsibilities

The successful candidate will:

  • Be experienced in cellular radio, RAN or Base Station FPGA design (5G, 4G, LTE,,…)
  • Understand high-level requirements and translate them into detailed specifications.
  • Design and implement RTL logic (mainly Verilog or System Verilog), run block-level simulation, FPGA synthesis and backend, timing closure.
  • Interface with the broader FPGA design team, hardware team and software team.
  • Perform lab bring-up, product integration and support.
  • Provide technical support to customers and lead them through complex technical issues

Requirements

The ideal individual is a senior/staff/principal FPGA Design Engineer with the following:

  • Minimum of an undergraduate degree in EE or equivalent skills/experience.
  • A minimum of 5+ years of relevant experience in progressive roles.
  • Experience with modern FPGA development and tools including logic design, synthesis, PnR and timing closure.
  • Experience with high-speed FPGA Design Flow using Verilog and Xilinx Vivado.
  • Experience with complex asynchronous clock boundaries & high-speed serial interfaces.
  • Experience in a lab environment, troubleshooting issues up to the system level.
  • Test verification and scripting experience is a plus.
  • Track record as a self-starter, a team player and a leader.
  • Experience in one or more of the following:
    • FPGA design in digital cellular radio, RAN or Base Stations.
    • Modern cellular standards (e.g. 5G, 4G, LTE, 3GPP, O-RAN).
    • DSP algorithm design and implementation in DSP devices or FPGAs.
    • Fronthaul/midhaul connectivity, eCPRI, CPRI, 10G+ Ethernet, optical networking.
    • CPU, GPU, NPU, DSP processor sub-system design or integration.
Custom Analog (FinFET) IC Design Engineer (Multiple)

Duties and Responsibilities

The Custom Analog (FinFET) IC Design Engineer will work on analog, mixed signal and custom memory circuits design often for Tier 1 semiconductor clients and leading edge process nodes. They will have the following responsibilities:

  • Custom analog, mixed signal and/or custom memory circuit architecture and design
  • Of block-level and top-level designs
  • In deep sub-micron FinFET CMOS process nodes (e.g. 5nm, 3nm)
  • Flow setup for new nodes and custom IP library porting to new nodes (e.g. 3nm)

Requirements

This position requires a dynamic custom analog IC design engineer who is a fast learner and is eager to apply their skills working with the latest tools and process technology:

  • A minimum of a Bachelor’s Degree in Electrical Engineering, Master’s preferred
  • A minimum of 8 years of relevant experience in high-speed analog, mixed signal or memory custom design
  • Experience in deep sub-micron FinFET CMOS (7nm and below, 5nm preferred)
  • Experience with Cadence Virtuoso and Virtuoso-XL tools and environment
  • Experience with Mentor Calibre DRC/LVS/PERC, and Apache Totem EM & IR analysis is a plus
  • Knowledge of analog design fundamentals in areas such as, SerDes, ADC/DAC, High-Speed I/O, RF, CDR, PLL, Memory Cells and Arrays
  • Strong understanding of circuit noise, equalization and linearity will be important
  • System knowledge of high-speed wireline and optical networking systems and components is an asset
Custom Analog FinFET IC Layout Engineer (Multiple)

Duties and Responsibilities

The Custom FinFET IC Layout Engineer will work on analog, mixed signal and custom memory circuits often for Tier 1 semiconductor clients and leading edge process nodes. They will have the following responsibilities:

  • Analog, mixed signal and/or custom memory circuit floor planning and layout
  • Of block-level and top-level designs
  • In deep sub-micron FinFET CMOS process nodes (e.g. 5nm, 3nm)

Requirements

This position requires a dynamic custom layout engineer who is a fast learner and is eager to apply their skills working with the latest tools and process technology:

  • A minimum of a Bachelor’s Degree in Electrical Engineering, Master’s preferred
  • A minimum of 5 years of relevant experience in high-speed analog, mixed signal or memory custom layout
  • Experience in deep submicron FinFET CMOS (7nm and below, 5nm preferred)
  • Experience with Cadence Virtuoso and Virtuoso-XL tools and environment
  • Experience with Mentor Calibre DRC/LVS/PERC, and Apache Totem EM & IR analysis is a plus
  • Knowledge of analog design fundamentals in areas such as Memory Cells and Arrays, SerDes, ADC/DAC, High-Speed Digital, RF, PLL
Embedded Software Designer – Networking

Duties and Responsibilities

The Networking Software Designer will interact with hardware and system groups to work on the latest technology. They will have the following responsibilities:

  • Specification and development in embedded Linux or VxWorks environments
  • Design, coding, testing and maintenance in C/C++
  • Development of L2/L3 networking control plane software for optical transport equipment

Requirements

This position requires a dynamic software designer who is a fast learner and is eager to apply their skills working with the latest software and system technology:

  • A minimum of an undergraduate degree in Computer Science, Computer or Electrical Engineering or an equivalent combination of skills and experience
  • A minimum of 8-10 years of relevant experience
  • Experience developing complex C++ applications required.
  • Experience with embedded development in embedded Linux or VxWorks environment
  • Experience with complex algorithms and data structures
  • Experience with optimizing performance of embedded software
  • Experience with L2/L3 networking control plane and routing software development for optical transport equipment, switches or routers
  • Experience in several of the following areas:
    • Protocols: IP: BGP, IS-IS, OSPF; MPLS: LDP, RSVP-TE, BGP-LU
    • Networking applications: Segment routing, seamless MPLS, L2 VPN, L3 VPN
Embedded Software Designer – Dataplane

Duties and Responsibilities

The Embedded Software Designer will interact with the system, software and hardware groups to work on the latest high-speed switch and router technology designed for core and edge networks. They will have the following responsibilities:

  • Design and develop software for new routing protocols and L2/L3 networking features including feature analysis, high-level design, implementation, and automated validation
  • Develop, debug and execute automated tests in Python
  • Develop embedded software in C on Linux/VxWorks platforms
  • Collaborate to troubleshoot, root cause and solve issues and optimize performance

Requirements

This position requires a dynamic embedded software designer who is a fast learner, can work independently as well as within a team and is eager to apply their skills working with the latest embedded switch and router technology:

  • Bachelors in Computer Science, Computer or Electrical Engineering
  • A minimum of 5 years of embedded, software experience required
  • Experience with C and Python required, assembly preferred
  • Experience developing real-time embedded software for:

o   Embedded Linux or VxWorks environments including

o   Multi-threading, IPC, mutual exclusion and synchronization and

o   Embedded data structures and database design

  • Strong verbal and technical writing skills required
  • Strong debugging skills required
  • Experience developing large-scale, reliable carrier-grade datacom software preferred
  • Experience developing embedded L2/L3 control plane software preferred
  • Experience with the following networking protocols and technologies preferred:

o   Routing protocols such as OSPF, BGP, ISIS

o   Segment Routing, Ethernet VPNs, MPLS Traffic Engineering, L2/L3 forwarding and routing

o   TCP/IP, Multi-cast, VxLAN, MPLS, L2/L3 VPN

 

Embedded Software Designer – Middleware

Duties and Responsibilities

The Embedded Software Designer will interact with the software and hardware groups to work on the latest carrier-grade embedded networking software. They will have the following responsibilities:

  • Specification and development of embedded software for use in Linux environments and standalone products
  • Development of an SDK for a new product
  • Architecture and design of a new system, implementation and testing of new code integrated with existing and third party code

Requirements

This position requires a dynamic embedded software designer who is a fast learner and is eager to apply their skills working with the latest embedded Linux and middleware technologies:

  • A minimum of an undergraduate degree in Computer Science, Computer or Electrical Engineering or the equivalent combination of skills and experience.
  • A minimum of 5 years of relevant embedded software experience.
  • Experience with C, Python and Bash required.
  • Experience with embedded software development in a Linux environment including multi-threading and IPC.
  • Experience developing, building and releasing SDKs
  • Experience developing applications in Linux user space required.
  • Knowledge of Yocto Project, writing recipes, managing various versions and packages
  • Experience with Yang modelling an asset
  • Low level architectural understanding and development experience with ARM embedded processors (A53) and microcontrollers required
  • Knowledge of CMIS standard preferred
  • Experience customizing Linux and Linux kernels for embedded systems preferred.
  • Experience developing drivers in Linux kernel space preferred.
  • VxWorks or FreeRTOS or similar experience preferred.
  • Experience designing and bringing up BOOTROMs required, U-Boot preferred
  • Experience in low level hardware driver development preferred
  • Experience with general algorithms, data structures and memory management preferred
  • Wired networking experience on optical transport, switch or router platforms preferred
Senior Hardware Design Engineer

Duties and Responsibilities

The successful candidate will be involved in the following:

  • Provide input to architecture and design reviews.
  • Functional requirements definition.
  • Selection of components and ensuring they meet electrical and functional interoperability.
  • Perform circuit level design. 
  • Manage PCB layout resources.
  • Test and debug designs once prototypes are built.
  • Prepare and maintain design documentation: system requirements, functional requirements, hardware and software user guides, verification test plans, system test plans.
  • Conduct and document engineering performance and budget analysis (Derating Analysis, FMECA, Worst case analysis).
  • Conduct and document failure mode and no fault found analysis.

Requirements

The ideal individual is a senior/staff/principal Hardware Design Engineer with the following:

  • Bachelors Degree in Electrical or Computer Engineering or equivalent.
  • A minimum of 7+ years of relevant experience in progressive roles.
  • Board level development experience utilizing high-speed digital circuits, analog circuits, power supply design, RF microwave circuits and/or FPGAs is required.
  • Design experience for the military or aerospace industries with applications in spacecraft relative navigation sensors, processing platforms, vision systems and LIDAR solutions.
  • Familiarity with MIL-STD-981 and EEE-INST-002 for component selection.
  • Experience designing products to meet extended temperatures, radiation hardened, high reliability and EMI/EMC compliance.
  • Experience with RF/Microwave tools such as Keysight ADS and Ansys HFSS is an asset.
  • Experience with schematic design capture tools. (Mentor Graphics and/or Cadence)
  • Experience with PCB layout design tools. (Mentor Graphics, Altium)
  • Experience with signal integrity analysis tools is an asset (Hyperlynx).
  • Experience with Hardware defect tracking tools and test methodologies is an asset.
  • Experience with using diagnostics tools like Digital Analyzers, Oscilloscopes, DVMs.
  • Experience in a lab environment, troubleshooting issues up to the system level.
  • Able to obtain a Federal Government Security Clearance (minimum Secret Level II) and pass security assessment for the Controlled Groups Program (CGP).
  • Track record as a self-starter, a team player and a leader.